Foreword
Let's start this thing with a look into linear amps. In order to increase the efficiency of Class-AB amps it's a common practice to modulate the rail voltage of the output stage transistors so to minimize their Vce. As Bob pointed out in chapter 5.6 of his book [1] there is some conflicting terminology - because it's also the way I learned it I'll use Bob's way of naming things.
Class-H
In case these modulation happens step-wise the concept is called Class-H. Although there were many designs out there none of them did something spectacular. The only implementation that stood out a little was the 'VZ'-design by Crown which did not only change the voltage but also the impedance of the supply.
Class-G
In case the modulation is done in a continuous fashion the topology is called Class-G. For sure, the most straightforward way to do this is to put even more BJTs into the box (see below). But the smarter way of course is to use a buck regulator. And of that there were three implementations we're going to discuss briefly.
Lab.Gruppen
They used a plain and simple clocked (614kHz) buck converter with PI controller in their FP series amplifiers [2]. Nothing spectacular but apparently they were quite successful with that.
Yamaha
These guys had a quite innovative idea - they kept the Class-G BJT stage but sensed its collector current [green parts]. When a certain threshold is exceeded another transistor is switched on that then feeds via an inductor [orage parts] current into the common node between Class-G stage (emitter) and output stage (collector) [blue]. Once the sensed current fell below the threshold a gate discharge circuit caused the FET to turn off fast.
This is nothing more than a self-oscillating, hysteretic current-mode buck-converter with linear ripple eater. Isn't that beautiful compared to the Lab.Gruppen design? (Think about "technical minimal systems"... [3]).
Philips
Then again there were people at Philips [sic!] who did this [4]:
Wait a second isn't that a UcD? Yes, it is - two unipolar ones. In 1985! The patent spec. states:
"
An oscillation is produced in the feedback loop formed by the components 16, 19, 20, 21, 22 and 23 when the gain in the loop is higher than unity for signals experiencing a 180° phase shift. The loop components are chosen so that this is indeed the case at a comparatively high frequency. [...]
The degree to which these components are suppressed will depend on the ratio between the oscillation frequency of the loop and the resonant frequency of filter 22. A high oscillation frequency therefore has an advantageous effect. In one embodiment the oscillation frequency was 400 kHz and the resonant frequency of filter 22 was 40 kHz. [...]
The feedback networks 23 and 23' are in the form of networks which are commonly referred to as phase lead networks. These networks shift the frequency at which 180° phase shift occurs in the feedback loops to a higher value so that these loops will oscillate at a high to very high frequency.
"
So Bruno Putzeys did not invent the UcD [5]? Well, I guess he did - but at the time he was struck by enlightenment the novelty was already gone.
Nowadays he is fully aware of that - maybe because a swede came across his way...
Once upon a time
I searched the internet. I don't exactly remember what I entered into the google search bar but this URL was part of page three (back in the day when there was no AI one sign of true desperation was feeling the urge to open page 2 ff. of google results):
- Bruno's original disclosure (you need to scroll down a bit)
- Some notes on discrete comparators
- A document in Swedish we'll cover in a second
Lingua franca
Unfortunately, I do not understand Swedish. But apparently the link to German is so short that it was no big deal for me to grasp at least some parts of the last document. Apparently section 1.4.1 tells us, that the UcD was invented in the '70s by Clayton S. Sturgeon [6].
A vibe-translation looks as follows:
"
Patrik realized early on that the technology commonly referred to as UcD is very powerful, as it can achieve good performance with low complexity. Bruno Putzeys (“Bruno”) had filed a patent application for this technology in 2001 when he was working at Philips. Bruno was now working at Hypex in the Netherlands, which had purchased a license for UcD from Philips. For this reason, Patrik and Jan-Peter van Amerongen from Hypex began discussing possible forms of collaboration in 2005. Shortly thereafter, Patrik found a patent application from the mid-1970s (US4041411) by Clayton S. Sturgeon, which described UcD, meaning that UcD is open technology. This was communicated to Hypex, with Bruno noting that he had not been the first to invent the technology referred to as UcD. Also note that the definition of UcD in the Agreement refers only to Hypex’s own implementation of UcD.
"
Now the very interesting part is, that in one of his most recent interviews [7] Bruno actually refers to that - maybe with a grain of salt - by stating:
"
So, to help liberate the IP, a gallant competitor generously spent time on Google Patents and ferreted out a lapsed patent from 1977 by one Clayton Sturgeon (US4041411), which describes a similar arrangement!
"
But I guess at least it's some sort of achievement to be seen as a competitor by Bruno :-P
4041411 - the number of the beast
- in order to obtain a load independent frequency response and minimal output impedance the feedback of an amplifier circuit must be taken from the output (also knows as 'global feedback'). However, in case of an SMPA the LC filter is inbetween...
- This filter comes with two state variables (inductor current and capacitor voltage) and in order to get a stable system both must be fed back (at least partially over frequency)
- Inductor current
- In SMPS design it's common practice to nest a current control loop inside a voltage loop in order to 'solve' the 'feedback from behind the filter'-problem.
- In 1999 Dave Edwards (analogspiceman) adapted this method for SMPA which is also known as "Leapfrog" method [8].
- Another well-known implementation is the BPCM from Høyerby [HOY05].
- However, the big problem here in general is that the inductor current also carries the output current of the amplifier - something that doesn't need to be fed back - just 'the ripple' is of interest. Also Edwards (at least kind of) figured out that the capacitor current could be the perfect 'replacement' as it covers the ripple but not the load current.
- Capacitor current
- To my knowledge there is only one implementation that really sensed the capacitor current - which is the mueta-amp [HUL02]. All other implementations also use the capacitor current - but in a smarter way.
- Capacitor current estimation
- Have a look at the unipolar UcD again. The capacitor in the lead-lag network does nothing less than 'estimating' the current in the LC-filter capacitor where R17/R18 act as the 'shunt' resistance for converting the current into a voltage. The resistor in series with the capacitor helps in minimizing the frequency range of the estimation.
- Without that resistor we end up at the GLIM amplifier [POU04a].
How to improve the UcD?
Closed loop frequency response
Increased loopgain
- Fist, the control loop does not 'know' about the first order behavior of the UcD so it will try to flatten it out - which doesn't make too much sense
- Second, as the UcD is a quite linear device in itself the output of R(s) must not only carry the error correction signal but also the input signal
Textbook method #1 (Hypex Ncore)
- one still being the feed-forward path
- the other being pre-filtered with a filter mimicking the closed-loop transfer function of the UcD
Textbook method #2
Patrik's method #1 ("Adaptive Modulation Servo" [AMS])
- Good: while in the aforementioned approaches the complexity of K'(s) goes up when designing K(s) with a non-1st-order closed loop response here this doesn't happen - simply because there is no (explicit) K'(s)-function involved. Still, the control loop doesn't 'try' to flatten change the frequency response of the actual SMPA.
- Bad: this method only works with a single-ended circuit (which definitely is not what you want when designing a high power SMPA).
"There is one more input on the comparator."
Patrik's method #2 ("OP1 loop")
- a lo-gain path that directly arrives at the comparator input
- a hi-gain path that further amplifies the error signal and comes with additional clamping
References:
- [1] (2011) Cordell - Designing Audio Power Amplifiers
- [2] Service manual fP3400
- [3] (2025) smpx-power - Class-D tales: The D is for Denmark (a comprehensive overview)
- [4] US4507619A
- [5] US7113038B2
- [6] US4041411
- [7] (2024) Putzeys - Life on the Edge – A Personal Perspective on the Past, Present, and Future of Class D Audio Amplifiers
- [8] (1999) Dave Edwards (analogspiceman) - The "Leapfrog" Method Of Switching Amplifier Control Loop Design
- [9] (1955) Lang, Ham - Conditional Feedback Systems A New Approach to Feedback Control
- [10] (2009) Schröder - Elektrische Antriebe Regelung von Antriebssystemen 3. bearbeitete Auflage
- [11] NAD M22 Service Manual
- [12] US8736367B2
- [13] (2011) diyaudio.com - post #9 of user Pabo in thread "Minimizing distortion in self-oscillating switching amplifiers - some thoughts..."
- [14] US10326415B2









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