Output Current Measurement

A lot of DIY projects are lacking features that are essential in commercial amplifier assemblies - such as output current measurement. In 'system amps' this is often required to implement advanced DSP stuff or speaker impedance measurement. Off the shelf modules targeted for such applications comprise imon output signals - such can be found e.g. in the ICEpower 1200AS module [1].

So how to do output current measurement?

In case it is guaranteed that the amplifier channel is not being bridged external (and if it is done internally a 'grounded bridge' configuration is chosen) a simple resistor connected to ground and in series with the load could do the job. But in case the amplifier is an SMPA you will end up in a little dilemma:

It is a very clever idea to (differentially) take the actually self-oscillating feedback of the loop directly from the filter capacitor.
It is a not so clever idea to place the shunt resistor in series to the capacitor

In Ncore-style loops you have the degree of freedom to tie the feedback takeoff for the inner UcD loop to the capacitor while sensing closely to the physical output of the assembly with the 'outer' loop. For all other loop arrangements the only method is to keep the resistor as small as possible in order not to compromise the output impedance of the amplifier.

Using a high-side shunt measurement seems to be tempting as it would allow for external bridging, however, the diff-amp will the the full output voltage swing as common mode and if there is only a very tiny bit of inequality in the resistors and/or a limited CMRR of the OP itself (which both cannot be avoided) the resolution (especially at higher load impedances [much voltage for less current]) of this 'measurement' is rather poor.

In my opinion using a hall sensor is clearly the easiest option.

Another solution can be found in the ICEpower 1200AS module (which features a ton more of super interesting concepts). The shunt resistor is hidden underneath the filter capacitor and the 'evaluation circuitry' is encircled in pink.

Here a high-side shunt is combined with a floating OP that senses the voltage drop and converts it into a current that is mirrored at V+ and then evaluated at GND potential. A similar circuit is sketched below However, this only works reliably if it is guaranteed that the output stays away from the rail with a margin of 3V or so. I'll cover this topic in another post.

In contrast Hypex modules often comprise a current measurement where the output current is 'estimated' by open-loop integration of the voltage of a 'secondary' winding on the filter inductor [2]. A concept I'd consider being flawed - which is why I'm not showing it here.

Output Over Current Detection

In case a simple 'overcurrent yes/no' information is sufficient things get even easier.

For decades there was a small manufacturer of affordable and reliable speakers and amps in Karlsruhe: KMT. Sadly, the owner Martin Meinzer passed away in 2023 and now the business is permanently closed. For some years they offered the S3000 amplifier which was (according to my knowledge) developed by Alexej Gerbershagen who now runs Lexa Audio.

While this device is highly interesting as a whole because it comprises a modified version of the Yamaha EEEngine topology [3] (with BJTs for switching and lateral FETs for the linear stage ;-) ) it also comes with a floating output over current detector:

The full schematic of the S3000 can be found here.

SMPA Switching Stage Protection

Cycle-bc-Cycle Current Limit: Introduction

The interesting thing about a SMPA power stage is that (together with the inevitable inductor of the LC filter) it can be made completely short circuit proof.

In switching regulators said behavior known as 'cycle-by-cycle current limit'. The idea behind is rather simple:

Once the overcurrent is detected (fast measurement needed) the power stage is 'deactivated' which means that all gates are discharged. The current in the inductor will then further flow via the body diodes of the switching stage - such that it ramps towards 0A

Ideally this is done using gate driver offering a fast enable/disable input such as the Si8244 [4]
I once had a conversation with a SiLabs representative. They confirmed that

Si8244 is exactly identical to SI8234 (they just wrote 'Class-D' in the datasheet to attract different customers)
The output sections are 'really' independent which means that the H-bridge can be connected 'the wrong way round' which gives some nice options in layouting

In this situation the output voltage will no more follow the input voltage and therefore the voltage loop (which is hopefully closed behind the finter) goes into saturation
Then

Either after the current fell below the OVC threshold and a defined time interval (e.g. 2µs) has expired
Or after the current fell below a second threshold
The drive is activated again. Because of the saturated voltage loop the transistors will turn on such that the current ramps up again.

In essence this means that the loop transitions from a voltage loop to a (more or less) hysteretic current loop while CbC-limit is active.

Here you see an amplifier driving a 8 Ohm load:

The yellow-brown-ish trace shows the output voltage, the pre-clipper limits the excursion
The blue trace shows the inductor current

Aganin the same amplifier and scope config but now with a 2 Ohm load:

Cycle-bc-Cycle Current Limit: Integrated Solutions

There are several gate driver ICs which directly embody this feature by measuring the voltage drop across Rds_on - which results in a very temperature dependent current limit behavior.

Taken from the IPT210N25NFD datasheet [5]

More sophisticated gate drivers adjust the internal threshold with a measured temperature (using a NTC) - which is very nice in case you use SMD transistors and the NTC is directly coupled to the drain tab. However, for high power designs there is still no way around TO247 or even larger packages - for which this solution will not work very well.

So in the end you will use simple resistors. Trust me ;-)

Cycle-bc-Cycle Current Limit: Implementation Details

Full Bridge Circuit

In theory one sensing resistor is sufficient in a full bridge switching stage. However, when it comes to layout considerations it might make more sense to use two resistors and add up the sensed voltages (as shown in the sketch below). The signal is then amplified and fed to a comparator.

One thing needs to be considered:

'Standard amps' are often built in a way that the power stage is sized for a desired output voltage and then everything is made beefy enough to support 2 Ohm loads (at full voltage).

When the load situation is known better (active speakers, system amps) it might be sufficient to make the amp able to support a given power rating (2kW in the case shown above) into 8 Ohms (voltage limited) and 4 Ohms (current limited).

When there is a real short circuit the voltage on the output will be close to 0V when the current limitation kicks in. This means that when the transistors are turned on again the voltage across the inductor is large and therefore the current ramps up fast. Or in other terms: the oscillation frequency of the current loop will be high.

When this amplifier now runs into overcurrent at 4 Ohms there is a comparatively substantial output voltage so the voltage across the inductor, current slope and switching frequency of the current loop will be less than in the example before.

-> Bandwidth of the amplification must be selected such that both cases result in equal limitation current. However, it seems to be possible to get decent results using cheap parts such as TLV9061 and AP331A.

In case the gate driver input side is GND referenced you might want to shift the signal 'upwards' using a digital isolator. It is further possible to bury some functional safety aspect in this circuit by using low active logic - e.g. using an (fast) optocoupler where the LED must be lit in order to enable the gate drivers.

The mentioned time delay is then most easily implemented at the output of the isolator using a RCD circuit and a schmitt-trigger input buffer/inverter.

Half Bridge Circuit

While the implementation was very straight forward for the full bridge in a half bridge circuit things start to become complex because you need two current measurements.

One solution (that can be found in Hypex modules [2]) is to place a shunt resistor in the drain path of the high-side FET and another one in the source path of the low-side FET. Both shunts are used to 'detune' current mirrors which then create an output current that is somewhat proportional the the current in the shunt. By rearranging the current mirror and feeding the upper one from its lower counterpart it is possible to end up with a circuit having just one output which can then again be handled by one comparator and RCD circuit.

A simulation of this circuit can be found here.

Shutting Off

Most likely the SMPA assembly cannot stay in CbC-limit forever due to thermal reasons. So after a while you would want to shut off the SMPA. This can be realized by counting the pulses in the enable signal e.g. using a µC by

configuring a HW counter/timer to count the pulses
read the counter value every 1 ms (+ reset to 0 afterwards)
feed the value into a low pass filter
compare the filter output against a threshold

ideally the threshold is somewhat dependent on heat sink temperature
shutting down the entire SMPA (channel) once the threshold is reached

Further Protective Measures

Maybe in hifi circles the myth that an amplifier should be able to generate output at its peak power for unlimited still lives on. But for professional applications it is common to build a SMPS that fully utilizes a B (or even C) breaker characteristic which allows the amp to generate several kilowatts for milliseconds to seconds. However, in the long run the available power from a 16A breaker is limited to something around 3600W. These might be distributed as follows:

200 W loss in the SMPS
100 W loss per SMPA channel

this is what the cooling will be designed for

4x 750 W permanent SMPA output power

which equals modest 14 Arms into 4 Ohms

Still it might make a lot of sense to design the cycle-by-cycle current limiter such that it act at +-90 Apk. So there is plenty of headroom for thermally overloading one SMPA channel in particular. Say we're running at 56 Arms (thereby not hitting the +-90 A limit) at 2 Ohms this means 6200W - which the SMPS will be able to deliver for a while. In a first approximation this would mean 1600 W loss in that channel instead of 100 W. The junction temperature of the FETs will be skyrocketing long before the thermal sensor on the heatsink will even notice it.

Smart people would now say: "let the DSP handle it". Yes and no.

In such complex systems of multiple assemblies it is a best-practice approach to design each sub-assembly in a way that it is able to fully protect is self (so you could torture it on a lab bench w/o it's companions).

Now imagine

you already implemented a hall sensor based current measurement circuit
and there already is a µC (which also does the pulse counting as described above)

which allows for real-time processing but with a rather modest sampling rate of 1 kHz

so directly sampling the imon output is not an option. Instead (after stripping the DC offset from the hall sensor IC output) you'd want to rectify and average the signal. The circuit on the left is well known [6] as an implementation of a precision full-wave rectifier. It is easy to see that adding a single capacitor yields an RMS-estimator which can be seen on the right

However, when you design this circuit for appropriate ripple reduction (e.g. at 20Hz) you will also get a rather slow settling to the correct output value. But by adding one more resistor and capacitor this circuit can be turned into a second order circuit giving way less response time w/o compromising ripple suppression:

A simulation of the circuit can be found here.

The output of the RMS-estimator can now be sampled using a µC and converted (e.g. by using a pre-computed lookup table) into a temperature difference between the heat sink temperature and the actual junction of the transistors. Adding said difference to the measured (e.g. using a NTC) heat sink temperature yields a junction temperature estimation. Implementing two shut off threshold temperatures (e.g. 85°C for the heat sink and 115°C for the junction) will ensure stable operation under all conditions.

Cheers,

References:

Leistungselektronik und Signalverarbeitung

Thursday, January 1, 2026

Circuit Snippets: Currents In Amplifiers